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SEALSQ has announced VaultIC409, a secure element based on its QS7001 platform that is designed to support post-quantum algorithms alongside RSA and ECC. The company says it targets existing VaultIC408 markets without requiring customers to redesign their hardware security architecture; engineering samples are planned for Q2 2027.
SEALSQ has announced VaultIC409, a secure element built on its QS7001 platform and designed to run post-quantum cryptography alongside established algorithms such as RSA and ECC. The company says the device targets markets served by VaultIC408 and is intended to give manufacturers a route to add post-quantum security without redesigning their existing hardware security architecture.
SEALSQ says VaultIC409 is designed to support ML-KEM (FIPS 203) for key establishment and ML-DSA (FIPS 204) for digital signatures, as well as RSA and elliptic-curve cryptography (ECC). The company describes the combination as supporting hybrid deployments in which established and post-quantum methods may both be used. The announcement does not provide performance results or specify which algorithm configurations will be available in a particular product version.
The device combines a hardware Root of Trust, cryptographic acceleration and a Serial Peripheral Interface (SPI) connection. SEALSQ says the accelerator will handle demanding cryptographic operations while sensitive keys and other assets remain within the secure element. The company also says SPI is intended to accommodate larger exchanges of cryptographic data, including the larger keys, signatures and certificates associated with some post-quantum schemes.
SEALSQ plans to demonstrate VaultIC409 through a TLS 1.3 application at Electronica, scheduled for November 10–13, 2026. The company says engineering samples are expected in Q2 2027, when customers and partners are expected to be able to evaluate the device and begin integration work. The QS7001 platform is undergoing Common Criteria EAL5+ certification; the source does not say that certification has been completed.
A Hardware Route to Post-Quantum Security
VaultIC409 addresses a practical challenge for manufacturers: adopting newer cryptographic methods can affect device hardware, communications and product development schedules. SEALSQ’s stated aim is to let customers use its secure element in existing VaultIC408 markets without rebuilding their hardware security foundation. If that compatibility holds for specific products, it could reduce the extent of redesign required, though the announcement does not describe validated customer implementations.
The announcement also brings the hardware constraints of post-quantum cryptography into focus. Larger cryptographic data and more demanding computations can affect constrained connected devices, so the accelerator and SPI interface are relevant parts of the product proposal. However, SEALSQ has not published independent benchmarks, power figures, throughput measurements or comparative testing that would establish how the device performs in real deployments.
For readers following connected-device security, the announcement is an early product-development step, not evidence that deployed devices are already protected against future quantum attacks. Availability of engineering samples, integration testing and the status of platform certification will help determine how quickly manufacturers can assess the product.
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From VaultIC408 to QS7001
VaultIC409 extends SEALSQ’s VaultIC secure element portfolio and is aimed at the same established markets as VaultIC408, according to the company. Secure elements are hardware components used to protect cryptographic keys and support functions such as device identity and secure communications. SEALSQ presents the new device as a way to add post-quantum capabilities while retaining a familiar hardware-security approach for existing customers.
The company’s announcement frames the need around the possibility that future quantum computers could weaken widely used public-key systems such as RSA and ECC. It also points to the increased data and computational demands involved in deploying post-quantum cryptography on embedded hardware. VaultIC409 is designed to support standards identified in the announcement as FIPS 203 and FIPS 204, while retaining compatibility with classical algorithms that manufacturers may still need.
SEALSQ says the underlying QS7001 platform is undergoing Common Criteria EAL5+ certification. That is a status reported by the company, not a completed certification. The source material provides no independent certification record or timeline for the process.
“VaultIC409 gives our customers a direct path to post-quantum security on a certified platform they already know.”
— Carlos Moreira, SEALSQ founder and CEO
Certification and Performance Still Pending
Several important product details are not yet available. SEALSQ has not released independent performance or power-consumption data, detailed compatibility information for customer hardware, or results from the planned TLS 1.3 demonstration. It is also not clear which specific hybrid cryptographic configurations the finished product will support.
The company says engineering samples are planned for Q2 2027, but provides no confirmed shipping date for production units. The QS7001 certification process remains underway according to the announcement, with no completion date stated. The material also does not identify customer evaluations, deployment commitments or independent verification of the claimed ability to avoid hardware redesign.
Electronica Demo and Sample Release
The next public milestone identified by SEALSQ is a TLS 1.3 demonstration at Electronica from November 10–13, 2026, at the company’s booth in Hall C6, stand 670. The demonstration may provide further detail on how VaultIC409 is used in a secure-communications application, though the announcement does not promise published test results.
SEALSQ says it expects to make engineering samples available in Q2 2027 for customer and partner evaluation. Those evaluations, any further technical disclosures and progress toward Common Criteria EAL5+ certification will be key developments to watch. Production availability and confirmed customer deployments have not been announced.
Key Questions
What is SEALSQ’s VaultIC409?
It is a secure element built on SEALSQ’s QS7001 platform and designed for connected devices. SEALSQ says it supports post-quantum algorithms as well as RSA and ECC.
Which post-quantum algorithms does it support?
The announcement lists ML-KEM (FIPS 203) for key establishment and ML-DSA (FIPS 204) for digital signatures. SEALSQ also says the device supports RSA and ECC.
When will VaultIC409 be available?
SEALSQ plans to provide engineering samples in Q2 2027. The company has not announced a production-release date.
Has the platform completed EAL5+ certification?
No completion is reported. SEALSQ says the QS7001 platform is undergoing Common Criteria EAL5+ certification; the announcement gives no expected completion date.
Will customers need to redesign their hardware?
SEALSQ says VaultIC409 targets the same markets as VaultIC408 and offers a path to post-quantum security without redesigning the existing hardware security architecture. Compatibility with particular customer products has not been independently detailed.
Source: rss
